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Author	SHA1	Message	Date
Binder Tronics	a188ada2a5	add missing e in the	2022-08-01 21:01:17 +02:00
deividAlfa	218b5100dd	Declare DMA Handler State as volatile ... Not doing so causes issues when optimizations are enabled, the flag can change at any time by the DMA interrupt, but the compiler is unaware.	2022-04-19 15:11:54 +01:00
Ali Labbene	156741e067	[PROJECTS][NUCLEO-F103RB][EEPROM] Replace hard-coded page end address by a variable in EE_VerifyPageFullyErased() ... Fixes issue raised in #11.	2022-01-21 17:54:07 +01:00
Eya	c750eab699	Release v1.8.4	2021-06-07 17:37:27 +01:00
Maerdl	0813c2c1a3	wrong define used to clear I2C ADDR flag	2021-05-12 15:46:34 +01:00
Attie Grande	f5aaa9b454	Add support for running SYSCLK from PLL1, via PLL2. ... For parts like the STM32F1 Connectivity Line (STM32F105xx, STM32F107xx), it is occasionally necessary to source SYSCLK via PLL2. This patch will add this support. - Add: `UTILS_GetPLL2OutputFrequency()` to calculate the output frequency of PLL2 - Add: `LL_PLL_ConfigSystemClock_PLL2()` to configure the system clock as sourced from HSE, via PLL2 and PLL1. - Add: Miscellaneous support definitions. Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>	2021-04-05 14:25:41 +01:00
Eya	276c4ab953	Release v1.8.3	2020-10-30 15:10:41 +01:00
rihab kouki	003dfc9e6c	Release v1.8.2	2020-10-05 08:36:58 +01:00
Eya	6ead386a08	Release v1.8.1	2020-08-28 17:16:38 +01:00
Ali Labbene	5ddefcd6a6	Update CONTRIBUTING.md and PULL_REQUEST_TEMPLATE.md with CLA procedure description and mention that pull-requests are now accepted	2020-03-26 10:42:15 +01:00
Eya	441b2cbdc2	Release v1.8.0	2019-07-19 14:54:54 +01:00
Christophe Cadoret	9352c01599	Initial commit	2019-04-16 14:02:33 +02:00