330 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			330 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
| /**
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|   ******************************************************************************
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|   * @file    Examples_LL/TIM/TIM_BreakAndDeadtime/Src/main.c
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|   * @author  MCD Application Team
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|   * @brief   This example shows how to configure the TIMER peripheral to generate  
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|   *          three center aligned PWM and complementary PWM signals, 
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|   *          to insert a defined dead time value, to use the break feature and 
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|   *          to lock the desired parameters, using the STM32F1xx TIM LL API.
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|   *          Peripheral initialization done using LL unitary services functions.
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|   ******************************************************************************
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|   * @attention
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|   *
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|   * <h2><center>© Copyright (c) 2016 STMicroelectronics.
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|   * All rights reserved.</center></h2>
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|   *
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|   * This software component is licensed by ST under BSD 3-Clause license,
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|   * the "License"; You may not use this file except in compliance with the
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|   * License. You may obtain a copy of the License at:
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|   *                        opensource.org/licenses/BSD-3-Clause
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|   *
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|   ******************************************************************************
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|   */
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| 
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| /* Includes ------------------------------------------------------------------*/
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| #include "main.h"
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| 
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| /** @addtogroup STM32F1xx_LL_Examples
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|   * @{
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|   */
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| 
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| /** @addtogroup TIM_BreakAndDeadtime
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|   * @{
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|   */
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| 
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| /* Private typedef -----------------------------------------------------------*/
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| /* Private define ------------------------------------------------------------*/
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| /* Private macro -------------------------------------------------------------*/
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| /* Private variables ---------------------------------------------------------*/
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| /* Private function prototypes -----------------------------------------------*/
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| __STATIC_INLINE void     SystemClock_Config(void);
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| __STATIC_INLINE void     ConfigureGPIO(void);
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| __STATIC_INLINE void     ConfigureTIMBreakAndDeadtime(void);
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| 
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| /* Private functions ---------------------------------------------------------*/
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| 
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| /**
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|   * @brief  Main program
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|   * @param  None
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|   * @retval None
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|   */
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| int main(void)
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| {
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|   /* Configure the system clock to 72 MHz */
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|   SystemClock_Config();
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| 
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|   /* Configure GPIO ports */  
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|   ConfigureGPIO();
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|   
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|   /* Configure timer instance */
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|   ConfigureTIMBreakAndDeadtime();
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| 
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|   /* Infinite loop */
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|   while (1)
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|   {
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|   }
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| }
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| 
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| /**
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|   * @brief  This function enables the peripheral clocks on required GPIOs and
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|   *         configures PA.08 (TIM1_CH1), PB.13 (TIM1_CH1N), PA.09 (TIM1_CH2),
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|   *         PB.14 (TIM1_CH2N), PA.10 (TIM1_CH3), PB.15 (TIM1_CH3N) and
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|   *         PB.12 (TIM1_BKIN). 
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|   * @param  None
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|   * @retval None
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|   */
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| __INLINE void ConfigureGPIO(void)
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| {  
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|   /******************************/
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|   /* Peripheral clocks enabling */
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|   /******************************/
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|   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA);
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| 	  LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
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| 
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|   /*************************/
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|   /* GPIO AF configuration */
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|   /*************************/
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|   
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|   /* GPIO TIM1_CH1 configuration */
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|   LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_8, LL_GPIO_MODE_ALTERNATE);
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|   LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_8, LL_GPIO_PULL_DOWN);
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|   LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_8, LL_GPIO_SPEED_FREQ_HIGH);
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| 
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|   /* GPIO TIM1_CH1N configuration */
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|   LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_13, LL_GPIO_MODE_ALTERNATE);
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|   LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_13, LL_GPIO_PULL_DOWN);
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|   LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_13, LL_GPIO_SPEED_FREQ_HIGH);
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| 
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|   /* GPIO TIM1_CH2 configuration */
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|   LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_9, LL_GPIO_MODE_ALTERNATE);
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|   LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_9, LL_GPIO_PULL_DOWN);
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|   LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_9, LL_GPIO_SPEED_FREQ_HIGH);
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| 
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|   /* GPIO TIM1_CH2N configuration */
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|   LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_14, LL_GPIO_MODE_ALTERNATE);
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|   LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_14, LL_GPIO_PULL_DOWN);
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|   LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_14, LL_GPIO_SPEED_FREQ_HIGH);
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| 
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|   /* GPIO TIM1_CH3 configuration */
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|   LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_10, LL_GPIO_MODE_ALTERNATE);
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|   LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_10, LL_GPIO_PULL_DOWN);
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|   LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_10, LL_GPIO_SPEED_FREQ_HIGH);
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| 
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|   /* GPIO TIM1_CH3N configuration */
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|   LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_15, LL_GPIO_MODE_ALTERNATE);
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|   LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_15, LL_GPIO_PULL_DOWN);
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|   LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_15, LL_GPIO_SPEED_FREQ_HIGH);
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|   
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|   /* GPIO TIM1_BKIN configuration */
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|   LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_12, LL_GPIO_MODE_ALTERNATE);
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|   LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_12, LL_GPIO_PULL_DOWN);
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|   LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_12, LL_GPIO_SPEED_FREQ_HIGH);
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| }
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| 
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| /**
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|   * @brief  This function enables the peripheral clock on TIM1, 
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|   *         configures the TIM1 counter in center-aligned mode,
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|   *         configures the output channels to generate complementary PWM signals
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|   *         with 4 us dead-time insertion, configures the break function,
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|   *         sets the lock level and starts output signals generation.
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|   * @note   Peripheral configuration is minimal configuration from reset values.
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|   *         Thus, some useless LL unitary functions calls below are provided as
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|   *         commented examples - setting is default configuration from reset.
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|   * @param  None
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|   * @retval None
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|   */
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| __STATIC_INLINE void ConfigureTIMBreakAndDeadtime(void)
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| {
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|   /*****************************/
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|   /* Peripheral clock enabling */
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|   /*****************************/
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|   /* Enable the peripheral clock of TIM1 */
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|   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM1);
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|   
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|   /***************************/
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|   /* Time base configuration */
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|   /***************************/
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|   /* Select center-aligned mode */
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|   LL_TIM_SetCounterMode(TIM1, LL_TIM_COUNTERMODE_CENTER_UP);
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|   
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|   /* Set the TIM1 prescaler to get counter clock frequency at 10 MHz */
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|   /* In this example TIM1 input clock (TIM1CLK) frequency is set to APB2      */
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|   /* (PCLK2), since APB2 pre-scaler is equal to 1.                            */
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|   /*  TIM1CLK = PCLK2                                                         */
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|   /*  PCLK2 = HCLK                                                            */
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|   /*  => TIM1CLK = HCLK = SystemCoreClock (72 Mhz)                            */
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|   LL_TIM_SetPrescaler(TIM1, __LL_TIM_CALC_PSC(SystemCoreClock, 10000000));
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|   
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|   /* Set the TIM1 auto-reload register to get a PWM frequency at 10 KHz */  
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|   /* Note that in macro call below, targeted PWM frequency must be multiplied */ 
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|   /* by 2 when the counter operates in center-aligned mode (due to the       */
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|   /* symmetry of the pattern).                                                */
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|   LL_TIM_SetAutoReload(TIM1, __LL_TIM_CALC_ARR(SystemCoreClock, LL_TIM_GetPrescaler(TIM1), 10000*2));
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| 
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|   /*********************************/
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|   /* Output waveform configuration */
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|   /*********************************/
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|   /* Set output channel 1 in PWM1 mode */
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|   LL_TIM_OC_SetMode(TIM1,  LL_TIM_CHANNEL_CH1,  LL_TIM_OCMODE_PWM1);
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|   
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|   /* Output channel 1 configuration:    */
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|   LL_TIM_OC_ConfigOutput(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_OCPOLARITY_HIGH | LL_TIM_OCIDLESTATE_HIGH);
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|   
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|   /*  Set PWM output channel 1 duty cycle to 50% */
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|   LL_TIM_OC_SetCompareCH1(TIM1, LL_TIM_GetAutoReload(TIM1) * 500 / 1000 );
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|   
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|   /* Set output channel 2 in PWM1 mode */
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|   LL_TIM_OC_SetMode(TIM1,  LL_TIM_CHANNEL_CH2,  LL_TIM_OCMODE_PWM1);
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| 
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|   /* Output channel 2 configuration:    */
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|   LL_TIM_OC_ConfigOutput(TIM1, LL_TIM_CHANNEL_CH2, LL_TIM_OCPOLARITY_HIGH | LL_TIM_OCIDLESTATE_HIGH);
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| 
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|   /*  Set PWM output channel 2 duty cycle to 25% */
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|   LL_TIM_OC_SetCompareCH2(TIM1, LL_TIM_GetAutoReload(TIM1) * 250 / 1000 );
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| 
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|   /* Set output channel 3 in PWM1 mode */
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|   LL_TIM_OC_SetMode(TIM1,  LL_TIM_CHANNEL_CH3,  LL_TIM_OCMODE_PWM1);
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| 
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|   /* Output channel 3 configuration:    */
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|   LL_TIM_OC_ConfigOutput(TIM1, LL_TIM_CHANNEL_CH3, LL_TIM_OCPOLARITY_HIGH | LL_TIM_OCIDLESTATE_HIGH);
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| 
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|   /*  Set PWM output channel 3 duty cycle to 12.5% */
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|   LL_TIM_OC_SetCompareCH3(TIM1, LL_TIM_GetAutoReload(TIM1) * 125 / 1000 );
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|   
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|   /*  Enable register preload for every output channels */
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|   LL_TIM_OC_EnablePreload(TIM1, LL_TIM_CHANNEL_CH1);
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|   LL_TIM_OC_EnablePreload(TIM1, LL_TIM_CHANNEL_CH2);
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|   LL_TIM_OC_EnablePreload(TIM1, LL_TIM_CHANNEL_CH3);
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|   
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|   /* Set dead time to 4 us (4000 ns) */
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|   LL_TIM_OC_SetDeadTime(TIM1, __LL_TIM_CALC_DEADTIME(SystemCoreClock, LL_TIM_GetClockDivision(TIM1), 4000));
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|   
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|   /********************************/
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|   /* Break function configuration */
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|   /********************************/
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|   /* Break input configuration:        */  
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|   LL_TIM_ConfigBRK(TIM1, LL_TIM_BREAK_POLARITY_HIGH);
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|   
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|   /* Outputs are automatically re-enabled when the *break input is no longer  */
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|   /* active                                                                   */
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|   LL_TIM_EnableAutomaticOutput(TIM1);
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|   
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|   /* Select the outputs off state in Idle and Run modes */
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|   LL_TIM_SetOffStates(TIM1, LL_TIM_OSSI_ENABLE, LL_TIM_OSSR_ENABLE);
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| 
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|   /* Enable the break input: */  
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|   LL_TIM_EnableBRK(TIM1);
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|   
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|   /**************************/
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|   /* Lock level programming */
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|   /**************************/
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|   /* Set lock level to 1:                                                     */
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|   /* From this point onward, deadtime, outputs idle state, break input        */
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|   /* configuration and automatic output enabling can no longer be written     */
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|   LL_TIM_CC_SetLockLevel(TIM1, LL_TIM_LOCKLEVEL_1);
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|   
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|   /**********************************/
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|   /* Start output signal generation */
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|   /**********************************/
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|   /* Enable outputs OC1, OC1N, OC2, OC2N, OC3 and OC3N */
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|   LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH1  |
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|                                 LL_TIM_CHANNEL_CH1N |
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|                                 LL_TIM_CHANNEL_CH2  |
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|                                 LL_TIM_CHANNEL_CH2N |
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|                                 LL_TIM_CHANNEL_CH3  |
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|                                 LL_TIM_CHANNEL_CH3N);
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|   
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|   /* Enable TIM1 outputs */
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|   LL_TIM_EnableAllOutputs(TIM1);
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|   
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|   /* Enable counter */
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|   LL_TIM_EnableCounter(TIM1);
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|   
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|   /* Force update generation */
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|   LL_TIM_GenerateEvent_UPDATE(TIM1);
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| }
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| 
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| /**
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|   * @brief  System Clock Configuration
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|   *         The system Clock is configured as follow :
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|   *            System Clock source            = PLL (HSE)
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|   *            SYSCLK(Hz)                     = 72000000
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|   *            HCLK(Hz)                       = 72000000
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|   *            AHB Prescaler                  = 1
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|   *            APB1 Prescaler                 = 2
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|   *            APB2 Prescaler                 = 1
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|   *            HSE Frequency(Hz)              = 8000000
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|   *            PLLMUL                         = 9
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|   *            Flash Latency(WS)              = 2
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|   * @param  None
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|   * @retval None
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|   */
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| void SystemClock_Config(void)
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| {
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|   /* Set FLASH latency */
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|   LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
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| 
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|   /* Enable HSE oscillator */
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|   LL_RCC_HSE_EnableBypass();
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|   LL_RCC_HSE_Enable();
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|   while(LL_RCC_HSE_IsReady() != 1)
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|   {
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|   };
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| 
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|   /* Main PLL configuration and activation */
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|   LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
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| 
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|   LL_RCC_PLL_Enable();
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|   while(LL_RCC_PLL_IsReady() != 1)
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|   {
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|   };
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| 
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|   /* Sysclk activation on the main PLL */
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|   LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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|   LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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|   while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
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|   {
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|   };
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| 
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|   /* Set APB1 & APB2 prescaler*/
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|   LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
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|   LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
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| 
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|   /* Set systick to 1ms in using frequency set to 72MHz */
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|   LL_Init1msTick(72000000);
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| 
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|   /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
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|   LL_SetSystemCoreClock(72000000);
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| }
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| 
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| #ifdef  USE_FULL_ASSERT
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| 
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| /**
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|   * @brief  Reports the name of the source file and the source line number
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|   *         where the assert_param error has occurred.
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|   * @param  file: pointer to the source file name
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|   * @param  line: assert_param error line source number
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|   * @retval None
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|   */
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| void assert_failed(uint8_t *file, uint32_t line)
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| {
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|   /* User can add his own implementation to report the file name and line number,
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|      ex: printf("Wrong parameters value: file %s on line %d", file, line) */
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| 
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|   /* Infinite loop */
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|   while (1)
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|   {
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|   }
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| }
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| #endif
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| 
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| /**
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|   * @}
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|   */
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| 
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| /**
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|   * @}
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|   */
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| 
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| /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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