274 lines
		
	
	
		
			9.9 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			274 lines
		
	
	
		
			9.9 KiB
		
	
	
	
		
			C
		
	
	
	
| /**
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|   ******************************************************************************
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|   * @file    stm32f1xx.h
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|   * @author  MCD Application Team
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|   * @brief   CMSIS STM32F1xx Device Peripheral Access Layer Header File. 
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|   *
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|   *          The file is the unique include file that the application programmer
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|   *          is using in the C source code, usually in main.c. This file contains:
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|   *            - Configuration section that allows to select:
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|   *              - The STM32F1xx device used in the target application
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|   *              - To use or not the peripheral's drivers in application code(i.e. 
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|   *                code will be based on direct access to peripheral's registers 
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|   *                rather than drivers API), this option is controlled by 
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|   *                "#define USE_HAL_DRIVER"
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|   *  
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|   ******************************************************************************
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|   * @attention
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|   *
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|   * Copyright (c) 2017-2021 STMicroelectronics.
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|   * All rights reserved.
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|   *
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|   * This software is licensed under terms that can be found in the LICENSE file
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|   * in the root directory of this software component.
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|   * If no LICENSE file comes with this software, it is provided AS-IS.
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|   *
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|   ******************************************************************************
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|   */
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| 
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| /** @addtogroup CMSIS
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|   * @{
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|   */
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| 
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| /** @addtogroup stm32f1xx
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|   * @{
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|   */
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|     
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| #ifndef __STM32F1XX_H
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| #define __STM32F1XX_H
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| 
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| #ifdef __cplusplus
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|  extern "C" {
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| #endif /* __cplusplus */
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|   
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| /** @addtogroup Library_configuration_section
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|   * @{
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|   */
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| 
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| /**
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|   * @brief STM32 Family
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|   */
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| #if !defined (STM32F1)
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| #define STM32F1
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| #endif /* STM32F1 */
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| 
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| /* Uncomment the line below according to the target STM32L device used in your 
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|    application 
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|   */
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| 
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| #if !defined (STM32F100xB) && !defined (STM32F100xE) && !defined (STM32F101x6) && \
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|     !defined (STM32F101xB) && !defined (STM32F101xE) && !defined (STM32F101xG) && !defined (STM32F102x6) && !defined (STM32F102xB) && !defined (STM32F103x6) && \
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|     !defined (STM32F103xB) && !defined (STM32F103xE) && !defined (STM32F103xG) && !defined (STM32F105xC) && !defined (STM32F107xC)
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|   /* #define STM32F100xB  */   /*!< STM32F100C4, STM32F100R4, STM32F100C6, STM32F100R6, STM32F100C8, STM32F100R8, STM32F100V8, STM32F100CB, STM32F100RB and STM32F100VB */
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|   /* #define STM32F100xE */    /*!< STM32F100RC, STM32F100VC, STM32F100ZC, STM32F100RD, STM32F100VD, STM32F100ZD, STM32F100RE, STM32F100VE and STM32F100ZE */
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|   /* #define STM32F101x6  */   /*!< STM32F101C4, STM32F101R4, STM32F101T4, STM32F101C6, STM32F101R6 and STM32F101T6 Devices */
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|   /* #define STM32F101xB  */   /*!< STM32F101C8, STM32F101R8, STM32F101T8, STM32F101V8, STM32F101CB, STM32F101RB, STM32F101TB and STM32F101VB */
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|   /* #define STM32F101xE */    /*!< STM32F101RC, STM32F101VC, STM32F101ZC, STM32F101RD, STM32F101VD, STM32F101ZD, STM32F101RE, STM32F101VE and STM32F101ZE */ 
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|   /* #define STM32F101xG  */   /*!< STM32F101RF, STM32F101VF, STM32F101ZF, STM32F101RG, STM32F101VG and STM32F101ZG */
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|   /* #define STM32F102x6 */    /*!< STM32F102C4, STM32F102R4, STM32F102C6 and STM32F102R6 */
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|   /* #define STM32F102xB  */   /*!< STM32F102C8, STM32F102R8, STM32F102CB and STM32F102RB */
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|   /* #define STM32F103x6  */   /*!< STM32F103C4, STM32F103R4, STM32F103T4, STM32F103C6, STM32F103R6 and STM32F103T6 */
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|   /* #define STM32F103xB  */   /*!< STM32F103C8, STM32F103R8, STM32F103T8, STM32F103V8, STM32F103CB, STM32F103RB, STM32F103TB and STM32F103VB */
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|   /* #define STM32F103xE */    /*!< STM32F103RC, STM32F103VC, STM32F103ZC, STM32F103RD, STM32F103VD, STM32F103ZD, STM32F103RE, STM32F103VE and STM32F103ZE */
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|   /* #define STM32F103xG  */   /*!< STM32F103RF, STM32F103VF, STM32F103ZF, STM32F103RG, STM32F103VG and STM32F103ZG */
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|   /* #define STM32F105xC */    /*!< STM32F105R8, STM32F105V8, STM32F105RB, STM32F105VB, STM32F105RC and STM32F105VC */
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|   /* #define STM32F107xC  */   /*!< STM32F107RB, STM32F107VB, STM32F107RC and STM32F107VC */  
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| #endif
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| 
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| /*  Tip: To avoid modifying this file each time you need to switch between these
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|         devices, you can define the device in your toolchain compiler preprocessor.
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|   */
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|   
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| #if !defined  (USE_HAL_DRIVER)
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| /**
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|  * @brief Comment the line below if you will not use the peripherals drivers.
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|    In this case, these drivers will not be included and the application code will 
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|    be based on direct access to peripherals registers 
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|    */
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|   /*#define USE_HAL_DRIVER */
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| #endif /* USE_HAL_DRIVER */
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| 
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| /**
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|   * @brief CMSIS Device version number
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|   */
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| #define __STM32F1_CMSIS_VERSION_MAIN   (0x04) /*!< [31:24] main version */
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| #define __STM32F1_CMSIS_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
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| #define __STM32F1_CMSIS_VERSION_SUB2   (0x04) /*!< [15:8]  sub2 version */
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| #define __STM32F1_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
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| #define __STM32F1_CMSIS_VERSION        ((__STM32F1_CMSIS_VERSION_MAIN << 24)\
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|                                        |(__STM32F1_CMSIS_VERSION_SUB1 << 16)\
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|                                        |(__STM32F1_CMSIS_VERSION_SUB2 << 8 )\
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|                                        |(__STM32F1_CMSIS_VERSION_RC))
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| 
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| /**
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|   * @}
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|   */
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| 
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| /** @addtogroup Device_Included
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|   * @{
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|   */
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| 
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| #if defined(STM32F100xB)
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|   #include "stm32f100xb.h"
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| #elif defined(STM32F100xE)
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|   #include "stm32f100xe.h"
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| #elif defined(STM32F101x6)
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|   #include "stm32f101x6.h"
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| #elif defined(STM32F101xB)
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|   #include "stm32f101xb.h"
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| #elif defined(STM32F101xE)
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|   #include "stm32f101xe.h"
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| #elif defined(STM32F101xG)
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|   #include "stm32f101xg.h"
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| #elif defined(STM32F102x6)
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|   #include "stm32f102x6.h"
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| #elif defined(STM32F102xB)
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|   #include "stm32f102xb.h"
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| #elif defined(STM32F103x6)
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|   #include "stm32f103x6.h"
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| #elif defined(STM32F103xB)
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|   #include "stm32f103xb.h"
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| #elif defined(STM32F103xE)
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|   #include "stm32f103xe.h"
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| #elif defined(STM32F103xG)
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|   #include "stm32f103xg.h"
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| #elif defined(STM32F105xC)
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|   #include "stm32f105xc.h"
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| #elif defined(STM32F107xC)
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|   #include "stm32f107xc.h"
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| #else
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|  #error "Please select first the target STM32F1xx device used in your application (in stm32f1xx.h file)"
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| #endif
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| 
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| /**
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|   * @}
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|   */
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| 
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| /** @addtogroup Exported_types
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|   * @{
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|   */  
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| typedef enum 
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| {
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|   RESET = 0, 
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|   SET = !RESET
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| } FlagStatus, ITStatus;
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| 
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| typedef enum 
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| {
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|   DISABLE = 0, 
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|   ENABLE = !DISABLE
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| } FunctionalState;
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| #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
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| 
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| typedef enum
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| {
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|   SUCCESS = 0U,
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|   ERROR = !SUCCESS
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| } ErrorStatus;
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| 
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| /**
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|   * @}
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|   */
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| 
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| 
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| /** @addtogroup Exported_macros
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|   * @{
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|   */
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| #define SET_BIT(REG, BIT)     ((REG) |= (BIT))
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| 
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| #define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
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| 
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| #define READ_BIT(REG, BIT)    ((REG) & (BIT))
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| 
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| #define CLEAR_REG(REG)        ((REG) = (0x0))
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| 
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| #define WRITE_REG(REG, VAL)   ((REG) = (VAL))
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| 
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| #define READ_REG(REG)         ((REG))
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| 
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| #define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
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| 
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| #define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL))) 
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| 
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| /* Use of CMSIS compiler intrinsics for register exclusive access */
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| /* Atomic 32-bit register access macro to set one or several bits */
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| #define ATOMIC_SET_BIT(REG, BIT)                             \
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|   do {                                                       \
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|     uint32_t val;                                            \
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|     do {                                                     \
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|       val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT);       \
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|     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
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|   } while(0)
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| 
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| /* Atomic 32-bit register access macro to clear one or several bits */
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| #define ATOMIC_CLEAR_BIT(REG, BIT)                           \
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|   do {                                                       \
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|     uint32_t val;                                            \
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|     do {                                                     \
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|       val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT);      \
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|     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
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|   } while(0)
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| 
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| /* Atomic 32-bit register access macro to clear and set one or several bits */
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| #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)                          \
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|   do {                                                                     \
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|     uint32_t val;                                                          \
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|     do {                                                                   \
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|       val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
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|     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U);               \
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|   } while(0)
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| 
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| /* Atomic 16-bit register access macro to set one or several bits */
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| #define ATOMIC_SETH_BIT(REG, BIT)                            \
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|   do {                                                       \
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|     uint16_t val;                                            \
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|     do {                                                     \
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|       val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT);       \
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|     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
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|   } while(0)
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| 
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| /* Atomic 16-bit register access macro to clear one or several bits */
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| #define ATOMIC_CLEARH_BIT(REG, BIT)                          \
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|   do {                                                       \
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|     uint16_t val;                                            \
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|     do {                                                     \
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|       val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT);      \
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|     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
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|   } while(0)
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| 
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| /* Atomic 16-bit register access macro to clear and set one or several bits */
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| #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK)                         \
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|   do {                                                                     \
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|     uint16_t val;                                                          \
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|     do {                                                                   \
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|       val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
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|     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U);               \
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|   } while(0)
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| 
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| 
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| /**
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|   * @}
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|   */
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| 
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| #if defined (USE_HAL_DRIVER)
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|  #include "stm32f1xx_hal.h"
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| #endif /* USE_HAL_DRIVER */
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| 
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| 
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| #ifdef __cplusplus
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| }
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| #endif /* __cplusplus */
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| 
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| #endif /* __STM32F1xx_H */
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| /**
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|   * @}
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|   */
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| 
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| /**
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|   * @}
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|   */
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|   
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| 
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| 
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| 
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