505 lines
		
	
	
		
			16 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			505 lines
		
	
	
		
			16 KiB
		
	
	
	
		
			C
		
	
	
	
| /**
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|   ******************************************************************************
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|   * @file    ak4343.c
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|   * @author  MCD Application Team
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|   * @version V2.0.0
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|   * @date    11-April-2016
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|   * @brief   This file provides the AK4343 Audio Codec driver.   
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|   ******************************************************************************
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|   * @attention
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|   *
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|   * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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|   *
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|   * Redistribution and use in source and binary forms, with or without modification,
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|   * are permitted provided that the following conditions are met:
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|   *   1. Redistributions of source code must retain the above copyright notice,
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|   *      this list of conditions and the following disclaimer.
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|   *   2. Redistributions in binary form must reproduce the above copyright notice,
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|   *      this list of conditions and the following disclaimer in the documentation
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|   *      and/or other materials provided with the distribution.
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|   *   3. Neither the name of STMicroelectronics nor the names of its contributors
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|   *      may be used to endorse or promote products derived from this software
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|   *      without specific prior written permission.
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|   *
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|   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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|   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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|   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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|   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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|   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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|   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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|   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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|   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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|   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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|   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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|   *
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|   ******************************************************************************
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|   */
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| 
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| /* Includes ------------------------------------------------------------------*/
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| #include "ak4343.h"
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| 
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| /* Private variables ---------------------------------------------------------*/
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| 
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| /* Local variable to determine whether the audio Codec is driven by:          */
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| /* - I2S master clock: value different of "0",                                */
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| /*   equivalent to I2S_MCLKOUTPUT_ENABLE                                      */
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| /* - its own internal PLL from I2S_CK: value equal to "0",                    */
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| /*   equivalent to I2S_MCLKOUTPUT_DISABLE                                     */
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| uint8_t ak4343_i2s_mclk_output = 1;     /* Default setting: master clock required */
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| 
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| 
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| /** @addtogroup BSP
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|   * @{
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|   */
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|   
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| /** @addtogroup Components
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|   * @{
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|   */ 
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| 
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| /** @addtogroup ak4343
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|   * @brief     This file provides a set of functions needed to drive the 
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|   *            CS43l22 audio codec.
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|   * @{
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|   */
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| 
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| /** @defgroup AK4343_Private_Types
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|   * @{
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|   */
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| 
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| /**
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|   * @}
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|   */ 
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|   
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| /** @defgroup AK4343_Private_Defines
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|   * @{
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|   */
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| /* Uncomment this line to enable verifying data sent to codec after each write 
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|    operation (for debug purpose) */
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| #if !defined (VERIFY_WRITTENDATA)  
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| /* #define VERIFY_WRITTENDATA */
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| #endif /* VERIFY_WRITTENDATA */
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| /**
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|   * @}
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|   */ 
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| 
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| /** @defgroup AK4343_Private_Macros
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|   * @{
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|   */
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| 
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| /**
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|   * @}
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|   */ 
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|   
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| /** @defgroup AK4343_Private_Variables
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|   * @{
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|   */
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| 
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| /* Audio codec driver structure initialization */  
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| AUDIO_DrvTypeDef ak4343_drv = 
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| {
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|   ak4343_Init,
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|   0,                      /* On some other codec audio devices: DeInit */
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|   0,                      /* On some other codec audio devices: ReadID */
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|   ak4343_Play,
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|   ak4343_Pause,
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|   ak4343_Resume,
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|   ak4343_Stop,  
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|   0,                      /* On some other codec audio devices: SetFrequency */
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|   ak4343_SetVolume,
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|   ak4343_SetMute,  
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|   ak4343_SetOutputMode,
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|   0,                      /* On some other codec audio devices: Reset */
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| };
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| 
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| static uint8_t Is_ak4343_Stop = 1;
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| 
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| /**
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|   * @}
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|   */ 
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| 
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| /** @defgroup AK4343_Function_Prototypes
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|   * @{
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|   */
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| static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
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| /**
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|   * @}
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|   */ 
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| 
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| /** @defgroup AK4343_Private_Functions
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|   * @{
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|   */ 
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| 
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| /**
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|   * @brief Initializes the audio codec and the control interface.
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|   *        Note: I2S standard is fixed to standard Philips.
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|   * @param DeviceAddr: Device address on communication Bus.   
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|   * @param OutputDevice: can be OUTPUT_DEVICE_SPEAKER, OUTPUT_DEVICE_HEADPHONE,
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|   *                       OUTPUT_DEVICE_BOTH or OUTPUT_DEVICE_AUTO .
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|   * @param Volume: Initial volume level (from 0 (Mute) to 100 (Max))
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|   * @param AudioFreq: Audio frequency used to play the audio stream.
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|   * @retval 0 if correct communication, else wrong communication
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|   */
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| uint32_t ak4343_Init(uint16_t DeviceAddr, uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq)
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| {
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|   uint32_t counter = 0;
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|   uint32_t Standard = 0;
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|   uint32_t PLLMode =0;
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|   
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|   /* Initialize the Control interface of the Audio Codec */
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|   AUDIO_IO_Init();
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| 
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|   /* I2S standard fixed to standard Philips */
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|   /* (Corresponding to I2S init parameter standard = I2S_STANDARD_PHILIPS) */
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|   Standard = AK4343_I2S_STANDARD_PHILIPS;
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|   
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|   /* PLL Slave SD/WS reference mode ----------------------*/
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|   if (ak4343_i2s_mclk_output == 0) /* I2S_MCLKOUTPUT_DISABLE */
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|   {
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|     /* set the PLLMode variable */
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|     PLLMode = 0x1;
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|   
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|     /* Set I2S standard */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x04, (Standard | 0x20));
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|     /* MCKI input frequency = 256.Fs */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x03);
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|     /* VCOM Power up (PMVCM bit)*/
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|     counter += CODEC_IO_Write(DeviceAddr, 0x00, 0x40);
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|     /* Enable PLL*/
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|     counter += CODEC_IO_Write(DeviceAddr, 0x01, 0x01);
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|   }
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|   /* Ext Slave mode with no PLL --------------------------*/
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|   else
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|   {
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|     /* Reset the PLL mode variable */
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|     PLLMode = 0;
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|     /* Set I2S standard */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x04, Standard);
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|     /* MCKI input frequency = 256.Fs */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x00);
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|     /* VCOM Power up (PMVCM bit)*/
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|     counter += CODEC_IO_Write(DeviceAddr, 0x00, 0x40);
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|   }
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|   
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|   
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|     /* Left Channel Digital Volume control */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x0A, VOLUME_CONVERT(Volume));  
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|     /* Right Channel Digital Volume control */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x0D, VOLUME_CONVERT(Volume));
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|   
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|   /* Extra Configuration (of the ALC) */
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|   counter += CODEC_IO_Write(DeviceAddr, 0x06, 0x3C );
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|   counter += CODEC_IO_Write(DeviceAddr, 0x08, 0xE1 );
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|   counter += CODEC_IO_Write(DeviceAddr, 0x0B, 0x00 );
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|   counter += CODEC_IO_Write(DeviceAddr, 0x07, 0x20 );
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|   counter += CODEC_IO_Write(DeviceAddr, 0x09, 0xC1 );
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|   counter += CODEC_IO_Write(DeviceAddr, 0x0C, 0xC1 );
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|   
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|   /* Uncomment these lines and set the correct filters values to use the    */
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|   /* codec digital filters (for more details refer to the codec datasheet)  */
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|     /* Filter 1 programming as High Pass filter (Fc=500Hz, Fs=8KHz, K=20, A=1, B=1) */
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|     /*
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|     counter += CODEC_IO_Write(DeviceAddr, 0x1C, 0x01);
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|     counter += CODEC_IO_Write(DeviceAddr, 0x1D, 0x80);
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|     counter += CODEC_IO_Write(DeviceAddr, 0x1E, 0xA0);
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|     counter += CODEC_IO_Write(DeviceAddr, 0x1F, 0x0B);
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|     */
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|     /* Filter 3 programming as Low Pass filter (Fc=20KHz, Fs=8KHz, K=40, A=1, B=1) */
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|     /*
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|     counter += CODEC_IO_Write(DeviceAddr, 0x1C, 0x01);
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|     counter += CODEC_IO_Write(DeviceAddr, 0x1D, 0x00);
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|     counter += CODEC_IO_Write(DeviceAddr, 0x1E, 0x01);
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|     counter += CODEC_IO_Write(DeviceAddr, 0x1F, 0x01);
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|     */
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|   
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|     /* Equilizer programming BP filter (Fc1=20Hz, Fc2=2.5KHz, Fs=44.1KHz, K=40, A=?, B=?, C=?) */
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|     /*
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|     counter += CODEC_IO_Write(DeviceAddr, 0x16, 0x00);
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|     counter += CODEC_IO_Write(DeviceAddr, 0x17, 0x75);
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|     counter += CODEC_IO_Write(DeviceAddr, 0x18, 0x00);
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|     counter += CODEC_IO_Write(DeviceAddr, 0x19, 0x01);
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|     counter += CODEC_IO_Write(DeviceAddr, 0x1A, 0x00);
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|     counter += CODEC_IO_Write(DeviceAddr, 0x1B, 0x51);
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|     */
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|   
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|   
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|   
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|   /* HEADPHONE codec configuration */
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|   if ((OutputDevice & OUTPUT_DEVICE_HEADPHONE) != 0)
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|   {
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|     /* MCKI is 256.Fs with no PLL */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x00 );
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|     /* Switch control from DAC to Headphone */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x0F, 0x09 );
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|     /* Bass Boost and Demphasis enable */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x0E, 0x18 );
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|     /* Power up MIN and DAC (PMMIN and PMDAC bits) */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x00, 0x74);
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|     /* Enable Slave mode and Left/Right HP lines*/
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|     counter += CODEC_IO_Write(DeviceAddr, 0x01, (0x30 | PLLMode));
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|     /* Exit HP mute mode */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x01, (0x70 | PLLMode));
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|   }
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|   
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|   /* SPEAKER codec configuration */
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|   if ((OutputDevice & OUTPUT_DEVICE_SPEAKER) != 0)
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|   {
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|     /* ReSelect the MCKI frequency (FS0-1 bits): 256.Fs */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x02 );
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|     /* Set up the path "DAC->Speaker-Amp" with no power save (DACS and SPPSN bits) */ 
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|     counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x20 );
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|     /* Speaker Gain (SPKG0-1 bits): Gain=+10.65dB(ALC off)/+12.65(ALC on) */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x03, 0x10);
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|     /* Power up Speaker and DAC (PMSPK and PMDAC bits) */
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|     counter += CODEC_IO_Write(DeviceAddr, 0x00, 0x54);
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|     /* Set up the path "DAC -> Speaker-Amp" with no power save (SPPSN bit) */ 
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|     counter += CODEC_IO_Write(DeviceAddr, 0x02, 0xA0 /*0xA1*/);   
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|   }
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|   
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|   /* Return communication control value */
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|   return counter;  
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| }
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| 
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| /**
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|   * @brief Start the audio Codec play feature.
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|   * @note For this codec no Play options are required.
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|   * @param DeviceAddr: Device address on communication Bus.   
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|   * @retval 0 if correct communication, else wrong communication
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|   */
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| uint32_t ak4343_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size)
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| {
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|   uint32_t counter = 0;
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|   
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|   if(Is_ak4343_Stop == 1)
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|   {
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|     /* Enable Output device */  
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|     counter += ak4343_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
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|     
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|     Is_ak4343_Stop = 0;
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|   }
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|   
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|   /* Return communication control value */
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|   return counter;  
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| }
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| 
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| /**
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|   * @brief Pauses playing on the audio codec.
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|   * @param DeviceAddr: Device address on communication Bus. 
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|   * @retval 0 if correct communication, else wrong communication
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|   */
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| uint32_t ak4343_Pause(uint16_t DeviceAddr)
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| {
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|   uint32_t counter = 0;
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|  
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|   /* Pause the audio file playing */
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|   /* Mute the output first */
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|   counter += ak4343_SetMute(DeviceAddr, AUDIO_MUTE_ON);
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|     
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|   return counter;
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| }
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| 
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| /**
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|   * @brief Resumes playing on the audio codec.
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|   * @param DeviceAddr: Device address on communication Bus. 
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|   * @retval 0 if correct communication, else wrong communication
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|   */
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| uint32_t ak4343_Resume(uint16_t DeviceAddr)
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| {
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|   uint32_t counter = 0;
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|   
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|   /* Unmute the output */
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|   counter += ak4343_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
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|   
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|   return counter;
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| }
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| 
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| /**
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|   * @brief Stops audio Codec playing. It powers down the codec.
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|   * @param DeviceAddr: Device address on communication Bus. 
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|   * @param CodecPdwnMode: selects the  power down mode.
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|   *          - CODEC_PDWN_HW: Physically power down the codec. When resuming from this
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|   *                           mode, the codec is set to default configuration 
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|   *                           (user should re-Initialize the codec in order to 
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|   *                            play again the audio stream).
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|   * @retval 0 if correct communication, else wrong communication
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|   */
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| uint32_t ak4343_Stop(uint16_t DeviceAddr, uint32_t CodecPdwnMode)
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| {
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|   uint32_t counter = 0;
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|   
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|   /* Mute the output first */
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|   counter += ak4343_SetMute(DeviceAddr, AUDIO_MUTE_ON);
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|   
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|   /* Power down the DAC and the speaker (PMDAC and PMSPK bits)*/
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|   counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x9F);
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|   
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|   Is_ak4343_Stop = 1;
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|   return counter;    
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| }
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| 
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| /**
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|   * @brief Sets higher or lower the codec volume level.
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|   * @param DeviceAddr: Device address on communication Bus.   
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|   * @param Volume: a byte value from 0 to 255 (refer to codec registers 
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|   *         description for more details).
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|   * @retval 0 if correct communication, else wrong communication
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|   */
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| uint32_t ak4343_SetVolume(uint16_t DeviceAddr, uint8_t Volume)
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| {
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|   uint32_t counter = 0;
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|   uint8_t convertedvol = VOLUME_CONVERT(Volume);
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|   
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|   /* Left Channel Digital Volume control */
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|   counter += CODEC_IO_Write(DeviceAddr, 0x0A, convertedvol);
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|   
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|   /* Right Channel Digital Volume control */
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|   counter += CODEC_IO_Write(DeviceAddr, 0x0D, convertedvol);
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|     
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|   return counter;
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| }
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| 
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| /**
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|   * @brief Enables or disables the mute feature on the audio codec.
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|   * @param DeviceAddr: Device address on communication Bus.   
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|   * @param Cmd: AUDIO_MUTE_ON to enable the mute or AUDIO_MUTE_OFF to disable the
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|   *             mute mode.
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|   * @retval 0 if correct communication, else wrong communication
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|   */
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| uint32_t ak4343_SetMute(uint16_t DeviceAddr, uint32_t Cmd)
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| {
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|   uint32_t counter = 0;
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|   uint32_t tmp = 0;
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|   
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|   /* Read the current value of the config register number 0x0E */
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|   tmp = AUDIO_IO_Read(DeviceAddr, 0x0E);
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|   
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|   /* Set the Mute mode */
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|   if(Cmd == AUDIO_MUTE_ON)
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|   {
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|     counter += CODEC_IO_Write(DeviceAddr, 0x0E, (tmp | 0x20));
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|   }
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|   else /* AUDIO_MUTE_OFF Disable the Mute */
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|   {
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|     counter += CODEC_IO_Write(DeviceAddr, 0x0E, (tmp & 0xD1));
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|   }
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|   return counter;
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| }
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| 
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| /**
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|   * @brief Switch dynamically (while audio file is played) the output target 
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|   *         (speaker or headphone).
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|   * @param DeviceAddr: Device address on communication Bus.
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|   * @param Output: specifies the audio output target: OUTPUT_DEVICE_SPEAKER,
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|   *         OUTPUT_DEVICE_HEADPHONE, OUTPUT_DEVICE_BOTH
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|   * @retval 0 if correct communication, else wrong communication
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|   */
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| uint32_t ak4343_SetOutputMode(uint16_t DeviceAddr, uint8_t Output)
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| {
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|   uint32_t counter = 0; 
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|   uint32_t tmp_reg = 0;
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|   
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|   switch (Output) 
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|   {
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|     case OUTPUT_DEVICE_SPEAKER:       /* SPK always OFF & HP always ON */
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|       /* Turn-off headset */
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|       /* Disable Left/Right HP lines*/
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|       tmp_reg = AUDIO_IO_Read(DeviceAddr, 0x01);
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|       counter += CODEC_IO_Write(DeviceAddr, 0x01, tmp_reg &~ 0x70);   
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|       
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|       /* Turn-on speaker */
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|       /* Power up Speaker and DAC (PMSPK and PMDAC bits) */
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|       counter += CODEC_IO_Write(DeviceAddr, 0x00, 0x54);
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|       /* Set up the path "DAC -> Speaker-Amp" with no power save (SPPSN bit) */ 
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|       counter += CODEC_IO_Write(DeviceAddr, 0x02, 0xA0 /*0xA1*/);   
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| 
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|       break;
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|     
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|     case OUTPUT_DEVICE_HEADPHONE:         /* SPK always ON & HP always OFF */
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|       /* Turn-on headset */
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|       /* Power up MIN and DAC (PMMIN and PMDAC bits) */
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|       counter += CODEC_IO_Write(DeviceAddr, 0x00, 0x74);
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|       /* Enable Slave mode and Left/Right HP lines*/
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|       counter += CODEC_IO_Write(DeviceAddr, 0x01, (0x30 | 0x00));
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|       /* Exit HP mute mode */
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|       counter += CODEC_IO_Write(DeviceAddr, 0x01, (0x70 | 0x00));
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|       
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|       /* Turn-off speaker */
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|       /* Set up the path "DAC -> Speaker-Amp" with power save (SPPSN bit) */ 
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|       tmp_reg = AUDIO_IO_Read(DeviceAddr, 0x02);
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|       counter += CODEC_IO_Write(DeviceAddr, 0x02, tmp_reg &~ 0x80);   
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| 
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|       break;
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| 
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|     default:
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|     case OUTPUT_DEVICE_BOTH:            /* SPK always ON & HP always ON */
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|       /* Turn-on headset */
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|       /* Enable Slave mode and Left/Right HP lines*/
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|       tmp_reg = AUDIO_IO_Read(DeviceAddr, 0x01);
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|       counter += CODEC_IO_Write(DeviceAddr, 0x01, tmp_reg | 0x70); 
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|       
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|       /* Turn-on speaker */
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|       /* Set up the path "DAC -> Speaker-Amp" with no power save (SPPSN bit) */ 
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|       tmp_reg = AUDIO_IO_Read(DeviceAddr, 0x02);
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|       counter += CODEC_IO_Write(DeviceAddr, 0x02, tmp_reg | 0x80);  
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|       break;
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| 
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|   }  
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|   return counter;
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| }
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| 
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| /**
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|   * @brief Enables or disables the requirement of I2S master clock 
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|   *        (supplied by I2S master device)
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|   * @param I2S_MCLKOutput: I2S initialisation parameter "MCLKOutput" determines 
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|   *        whether the audio Codec is driven by:
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|   *         - I2S master clock: value different of "0",
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|   *           equivalent to I2S_MCLKOUTPUT_ENABLE
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|   *         - its own internal PLL from I2S_CK: value equal to "0",
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|   *           equivalent to I2S_MCLKOUTPUT_DISABLE
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|   * @retval None
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|   */
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| void ak4343_MCLKOutput(uint32_t I2S_MCLKOutput)
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| {
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|   /* Update private variable */
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|   ak4343_i2s_mclk_output = I2S_MCLKOutput;
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|   
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| }
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| 
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| /**
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|   * @brief  Writes/Read a single data.
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|   * @param  Addr: I2C address
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|   * @param  Reg: Reg address 
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|   * @param  Value: Data to be written
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|   * @retval None
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|   */
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| static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
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| {
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|   uint32_t result = 0;
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|   
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|   AUDIO_IO_Write(Addr, Reg, Value);
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|   
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| #ifdef VERIFY_WRITTENDATA
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|   /* Verify that the data has been correctly written */  
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|   result = (AUDIO_IO_Read(Addr, Reg) == Value)? 0:1;
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| #endif /* VERIFY_WRITTENDATA */
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|   
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|   return result;
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| }
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| 
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| /**
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|   * @}
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|   */
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| 
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| /**
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|   * @}
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|   */
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| 
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| /**
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|   * @}
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|   */
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| 
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| /**
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|   * @}
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|   */
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| 
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| /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 |