93 lines
3.7 KiB
C
93 lines
3.7 KiB
C
/**
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******************************************************************************
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* @file ADC/ADC_AnalogWatchdog/Inc/main.h
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* @author MCD Application Team
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* @brief Header for main.c module
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __MAIN_H
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#define __MAIN_H
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f1xx_hal.h"
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#include "stm32f1xx_nucleo.h"
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/* Trigger for ADC: */
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/* - If this literal is defined: ADC is operating in not continuous mode */
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/* and conversions are trigger by external trigger: timer. */
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/* - If this literal is not defined: ADC is operating in continuous mode */
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/* and first conversion is trigger by software trigger. */
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#define ADC_TRIGGER_FROM_TIMER
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/* User can use this section to tailor ADCx instance under use and associated
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resources */
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/* ## Definition of ADC related resources ################################### */
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/* Definition of ADCx clock resources */
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#define ADCx ADC1
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#define ADCx_CLK_ENABLE() __HAL_RCC_ADC1_CLK_ENABLE()
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#define ADCx_FORCE_RESET() __HAL_RCC_ADC1_FORCE_RESET()
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#define ADCx_RELEASE_RESET() __HAL_RCC_ADC1_RELEASE_RESET()
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/* Definition of ADCx channels */
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#define ADCx_CHANNELa ADC_CHANNEL_4
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/* Definition of ADCx channels pins */
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#define ADCx_CHANNELa_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
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#define ADCx_CHANNELa_GPIO_PORT GPIOA
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#define ADCx_CHANNELa_PIN GPIO_PIN_4
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/* Definition of ADCx DMA resources */
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#define ADCx_DMA_CLK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE()
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#define ADCx_DMA DMA1_Channel1
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#define ADCx_DMA_IRQn DMA1_Channel1_IRQn
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#define ADCx_DMA_IRQHandler DMA1_Channel1_IRQHandler
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/* Definition of ADCx NVIC resources */
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#define ADCx_IRQn ADC1_2_IRQn
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#define ADCx_IRQHandler ADC1_2_IRQHandler
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#if defined(ADC_TRIGGER_FROM_TIMER)
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/* ## Definition of TIM related resources ################################### */
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/* Definition of TIMx clock resources */
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#define TIMx TIM3 /* Caution: Timer instance must be on APB1 (clocked by PCLK1) due to frequency computation in function "TIM_Config()" */
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#define TIMx_CLK_ENABLE() __HAL_RCC_TIM3_CLK_ENABLE()
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#define TIMx_FORCE_RESET() __HAL_RCC_TIM3_FORCE_RESET()
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#define TIMx_RELEASE_RESET() __HAL_RCC_TIM3_RELEASE_RESET()
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#define ADC_EXTERNALTRIGCONV_Tx_TRGO ADC_EXTERNALTRIGCONV_T3_TRGO
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#endif /* ADC_TRIGGER_FROM_TIMER */
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions ------------------------------------------------------- */
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#endif /* __MAIN_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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