108 lines
4.7 KiB
Plaintext
108 lines
4.7 KiB
Plaintext
/**
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@page TIM_ComplementarySignals TIM Complementary Signals example
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@verbatim
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******************** (C) COPYRIGHT 2016 STMicroelectronics *******************
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* @file TIM/TIM_ComplementarySignals/readme.txt
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* @author MCD Application Team
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* @brief Description of the TIM Complementary Signals example.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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Configuration of the TIM1 peripheral to generate three
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complementary signals, insert a predefined deadtime value, use the break
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feature, and lock the break and dead-time configuration.
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TIM1CLK is fixed to SystemCoreClock, the TIM1 Prescaler is set to have
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TIM1 counter clock = 12MHz.
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The objective is to generate PWM signal at 10 KHz:
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- TIM1_Period = (TIM1 counter clock / 10000) - 1
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The Three Duty cycles are computed as the following description:
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The channel 1 duty cycle is set to 50% so channel 1N is set to 50%.
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The channel 2 duty cycle is set to 25% so channel 2N is set to 75%.
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The channel 3 duty cycle is set to 12.5% so channel 3N is set to 87.5%.
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The Timer pulse is calculated as follows:
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- ChannelxPulse = DutyCycle * (TIM1_Period - 1) / 100
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A dead time equal to 100/SystemCoreClock (around 2.1us) is inserted between
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the different complementary signals, and the Lock level 1 is selected.
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- The OCx output signal is the same as the reference signal except for the rising edge,
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which is delayed relative to the reference rising edge.
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- The OCxN output signal is the opposite of the reference signal except for the rising
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edge, which is delayed relative to the reference falling edge
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Note that calculated duty cycles apply to the reference signal (OCxREF) from
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which outputs OCx and OCxN are generated. As dead time insertion is enabled the
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duty cycle measured on OCx will be slightly lower.
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The break Polarity is used at High level.
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The TIM1 waveforms can be displayed using an oscilloscope.
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@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
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based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
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a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
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than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
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@note The application need to ensure that the SysTick time base is always set to 1 millisecond
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to have correct HAL operation.
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@par Directory contents
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- TIM/TIM_ComplementarySignals/Inc/stm32f1xx_hal_conf.h HAL configuration file
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- TIM/TIM_ComplementarySignals/Inc/stm32f1xx_it.h Interrupt handlers header file
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- TIM/TIM_ComplementarySignals/Inc/main.h Header for main.c module
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- TIM/TIM_ComplementarySignals/Src/stm32f1xx_it.c Interrupt handlers
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- TIM/TIM_ComplementarySignals/Src/main.c Main program
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- TIM/TIM_ComplementarySignals/Src/stm32f1xx_hal_msp.c HAL MSP file
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- TIM/TIM_ComplementarySignals/Src/system_stm32f1xx.c STM32F1xx system source file
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@par Hardware and Software environment
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- This example runs on STM32F103xG devices.
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- This example has been tested with STMicroelectronics STM3210E-EVAL RevD
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board and can be easily tailored to any other supported device
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and development board.
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- STM3210E-EVAL RevD Set-up
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- Connect the TIM1 pins to an oscilloscope to monitor the different waveforms:
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- TIM1_CH1 pin (PA.08 (On Eval Board, pin 6 on CN10 for example))
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- TIM1_CH1N pin (PB.13 (On Eval Board, pin 21 on CN11 for example))
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- TIM1_CH2 pin (PA.09 (On Eval Board, pin 7 on CN10 for example))
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- TIM1_CH2N pin (PB.14 (On Eval Board, pin 20 on CN11 for example))
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- TIM1_CH3 pin (PA.10 (On Eval Board, pin 8 on CN10 for example))
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- TIM1_CH3N pin (PB.15 (On Eval Board, pin 18 on CN11 for example))
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- Connect the TIM1 break pin TIM1_BKIN pin (PB.12 (On Eval Board, pin 22 on CN11 for example)) to the GND. To generate a
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break event, switch this pin level from 0V to 3.3V.
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@par How to use it ?
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In order to make the program work, you must do the following :
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the example
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*/
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