276 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			276 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
| /**
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|   ******************************************************************************
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|   * @file    stm32f1xx_hal_dma_ex.h
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|   * @author  MCD Application Team
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|   * @brief   Header file of DMA HAL extension module.
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|   ******************************************************************************
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|   * @attention
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|   *
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|   * Copyright (c) 2016 STMicroelectronics.
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|   * All rights reserved.
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|   *
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|   * This software is licensed under terms that can be found in the LICENSE file in
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|   * the root directory of this software component.
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|   * If no LICENSE file comes with this software, it is provided AS-IS.
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|   *
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|   ******************************************************************************
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|   */
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| 
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| /* Define to prevent recursive inclusion -------------------------------------*/
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| #ifndef __STM32F1xx_HAL_DMA_EX_H
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| #define __STM32F1xx_HAL_DMA_EX_H
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| 
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| #ifdef __cplusplus
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|  extern "C" {
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| #endif
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| 
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| /* Includes ------------------------------------------------------------------*/
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| #include "stm32f1xx_hal_def.h"
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| 
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| /** @addtogroup STM32F1xx_HAL_Driver
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|   * @{
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|   */
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| 
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| /** @defgroup DMAEx DMAEx
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|   * @{
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|   */
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| 
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| /* Exported types ------------------------------------------------------------*/ 
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| /* Exported constants --------------------------------------------------------*/
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| /* Exported macro ------------------------------------------------------------*/
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| /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
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|   * @{
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|   */
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| /* Interrupt & Flag management */
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| #if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \
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|     defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
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| /** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices
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|   * @{
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|   */
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| 
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| /**
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|   * @brief  Returns the current DMA Channel transfer complete flag.
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|   * @param  __HANDLE__: DMA handle
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|   * @retval The specified transfer complete flag index.
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|   */
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| #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
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| (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
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|    DMA_FLAG_TC5)
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| 
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| /**
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|   * @brief  Returns the current DMA Channel half transfer complete flag.
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|   * @param  __HANDLE__: DMA handle
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|   * @retval The specified half transfer complete flag index.
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|   */      
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| #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
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| (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
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|    DMA_FLAG_HT5)
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| 
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| /**
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|   * @brief  Returns the current DMA Channel transfer error flag.
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|   * @param  __HANDLE__: DMA handle
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|   * @retval The specified transfer error flag index.
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|   */
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| #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
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| (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
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|    DMA_FLAG_TE5)
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| 
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| /**
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|   * @brief  Return the current DMA Channel Global interrupt flag.
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|   * @param  __HANDLE__: DMA handle
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|   * @retval The specified transfer error flag index.
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|   */
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| #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
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| (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\
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|    DMA_FLAG_GL5)
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|    
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| /**
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|   * @brief  Get the DMA Channel pending flags.
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|   * @param  __HANDLE__: DMA handle
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|   * @param  __FLAG__: Get the specified flag.
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|   *          This parameter can be any combination of the following values:
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|   *            @arg DMA_FLAG_TCx:  Transfer complete flag
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|   *            @arg DMA_FLAG_HTx:  Half transfer complete flag
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|   *            @arg DMA_FLAG_TEx:  Transfer error flag
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|   *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.   
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|   * @retval The state of FLAG (SET or RESET).
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|   */
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| #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
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| (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
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|   (DMA1->ISR & (__FLAG__)))
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| 
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| /**
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|   * @brief  Clears the DMA Channel pending flags.
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|   * @param  __HANDLE__: DMA handle
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|   * @param  __FLAG__: specifies the flag to clear.
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|   *          This parameter can be any combination of the following values:
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|   *            @arg DMA_FLAG_TCx:  Transfer complete flag
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|   *            @arg DMA_FLAG_HTx:  Half transfer complete flag
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|   *            @arg DMA_FLAG_TEx:  Transfer error flag
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|   *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.   
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|   * @retval None
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|   */
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| #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
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| (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
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|   (DMA1->IFCR = (__FLAG__)))
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| 
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| /**
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|   * @}
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|   */
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| 
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| #else
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| /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
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|   * @{
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|   */
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| 
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| /**
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|   * @brief  Returns the current DMA Channel transfer complete flag.
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|   * @param  __HANDLE__: DMA handle
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|   * @retval The specified transfer complete flag index.
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|   */
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| #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
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| (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
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|    DMA_FLAG_TC7)
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| 
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| /**
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|   * @brief  Return the current DMA Channel half transfer complete flag.
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|   * @param  __HANDLE__: DMA handle
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|   * @retval The specified half transfer complete flag index.
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|   */
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| #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
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| (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
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|    DMA_FLAG_HT7)
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| 
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| /**
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|   * @brief  Return the current DMA Channel transfer error flag.
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|   * @param  __HANDLE__: DMA handle
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|   * @retval The specified transfer error flag index.
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|   */
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| #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
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| (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
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|    DMA_FLAG_TE7)
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| 
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| /**
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|   * @brief  Return the current DMA Channel Global interrupt flag.
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|   * @param  __HANDLE__: DMA handle
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|   * @retval The specified transfer error flag index.
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|   */
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| #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
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| (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
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|  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
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|    DMA_FLAG_GL7)
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| 
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| /**
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|   * @brief  Get the DMA Channel pending flags.
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|   * @param  __HANDLE__: DMA handle
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|   * @param  __FLAG__: Get the specified flag.
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|   *          This parameter can be any combination of the following values:
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|   *            @arg DMA_FLAG_TCx:  Transfer complete flag
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|   *            @arg DMA_FLAG_HTx:  Half transfer complete flag
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|   *            @arg DMA_FLAG_TEx:  Transfer error flag
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|   *            @arg DMA_FLAG_GLx:  Global interrupt flag
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|   *         Where x can be 1_7 to select the DMA Channel flag.   
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|   * @retval The state of FLAG (SET or RESET).
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|   */
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| 
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| #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)   (DMA1->ISR & (__FLAG__))
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| 
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| /**
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|   * @brief  Clear the DMA Channel pending flags.
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|   * @param  __HANDLE__: DMA handle
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|   * @param  __FLAG__: specifies the flag to clear.
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|   *          This parameter can be any combination of the following values:
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|   *            @arg DMA_FLAG_TCx:  Transfer complete flag
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|   *            @arg DMA_FLAG_HTx:  Half transfer complete flag
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|   *            @arg DMA_FLAG_TEx:  Transfer error flag
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|   *            @arg DMA_FLAG_GLx:  Global interrupt flag
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|   *         Where x can be 1_7 to select the DMA Channel flag.   
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|   * @retval None
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|   */
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| #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
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| 
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| /**
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|   * @}
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|   */
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| 
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| #endif
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|   
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| /**
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|   * @}
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|   */
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| 
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| /**
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|   * @}
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|   */
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| 
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| /**
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|   * @}
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|   */
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| 
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| #ifdef __cplusplus
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| }
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| #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */
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|        /* STM32F103xG || STM32F105xC || STM32F107xC */
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| 
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| #endif /* __STM32F1xx_HAL_DMA_H */
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| 
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