114 lines
3.0 KiB
C
114 lines
3.0 KiB
C
/**
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******************************************************************************
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* @file stm3210e_eval_sram.h
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* @author MCD Application Team
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* @version V7.0.0
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* @date 14-April-2017
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* @brief This file contains the common defines and functions prototypes for
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* the stm3210e_eval_sram.c driver.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM3210E_EVAL_SRAM_H
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#define __STM3210E_EVAL_SRAM_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f1xx_hal.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup STM3210E_EVAL
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* @{
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*/
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/** @addtogroup STM3210E_EVAL_SRAM
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* @{
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup STM3210E_EVAL_SRAM_Exported_Constants STM3210E EVAL SRAM Exported Constants
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* @{
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*/
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/**
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* @brief SRAM status structure definition
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*/
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#define SRAM_OK 0x00
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#define SRAM_ERROR 0x01
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#define SRAM_DEVICE_ADDR ((uint32_t)0x68000000)
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#define SRAM_DEVICE_SIZE ((uint32_t)0x200000) /* SRAM device size in MBytes */
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/* #define SRAM_MEMORY_WIDTH FSMC_NORSRAM_MEM_BUS_WIDTH_8 */
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#define SRAM_MEMORY_WIDTH FSMC_NORSRAM_MEM_BUS_WIDTH_16
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#define SRAM_BURSTACCESS FSMC_BURST_ACCESS_MODE_DISABLE
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/* #define SRAM_BURSTACCESS FSMC_BURST_ACCESS_MODE_ENABLE*/
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#define SRAM_WRITEBURST FSMC_WRITE_BURST_DISABLE
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/* #define SRAM_WRITEBURST FSMC_WRITE_BURST_ENABLE */
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/* DMA definitions for SRAM DMA transfer */
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#define __SRAM_DMAx_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
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#define SRAM_DMAx_STREAM DMA2_Channel1
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#define SRAM_DMAx_IRQn DMA2_Channel1_IRQn
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#define SRAM_DMAx_IRQHandler DMA2_Channel1_IRQHandler
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup STM3210E_EVAL_SRAM_Exported_Functions
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* @{
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*/
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uint8_t BSP_SRAM_Init(void);
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uint8_t BSP_SRAM_ReadData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
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uint8_t BSP_SRAM_ReadData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
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uint8_t BSP_SRAM_WriteData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
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uint8_t BSP_SRAM_WriteData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
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void BSP_SRAM_DMA_IRQHandler(void);
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void BSP_SRAM_MspInit(void);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM3210E_EVAL_SRAM_H */
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