330 lines
10 KiB
C
330 lines
10 KiB
C
/**
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******************************************************************************
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* @file stm3210e_eval_sram.c
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* @author MCD Application Team
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* @version V7.0.0
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* @date 14-April-2017
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* @brief This file includes the SRAM driver for the IS61WV51216BLL-10M memory
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* device mounted on STM3210E-EVAL evaluation board.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* File Info : -----------------------------------------------------------------
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User NOTES
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1. How To use this driver:
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--------------------------
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- This driver is used to drive the IS61WV51216BLL-10M SRAM external memory mounted
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on STM3210E-EVAL evaluation board.
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- This driver does not need a specific component driver for the SRAM device
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to be included with.
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2. Driver description:
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---------------------
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+ Initialization steps:
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o Initialize the SRAM external memory using the BSP_SRAM_Init() function. This
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function includes the MSP layer hardware resources initialization and the
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FSMC controller configuration to interface with the external SRAM memory.
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+ SRAM read/write operations
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o SRAM external memory can be accessed with read/write operations once it is
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initialized.
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Read/write operation can be performed with AHB access using the functions
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BSP_SRAM_ReadData()/BSP_SRAM_WriteData(), or by DMA transfer using the functions
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BSP_SRAM_ReadData_DMA()/BSP_SRAM_WriteData_DMA().
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o The AHB access is performed with 16-bit width transaction, the DMA transfer
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configuration is fixed at single (no burst) halfword transfer
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(see the SRAM_MspInit() static function).
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o User can implement his own functions for read/write access with his desired
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configurations.
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o If interrupt mode is used for DMA transfer, the function BSP_SRAM_DMA_IRQHandler()
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is called in IRQ handler file, to serve the generated interrupt once the DMA
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transfer is complete.
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------------------------------------------------------------------------------*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm3210e_eval_sram.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup STM3210E_EVAL
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* @{
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*/
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/** @defgroup STM3210E_EVAL_SRAM STM3210E EVAL SRAM
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* @{
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*/
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/* Private variables ---------------------------------------------------------*/
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/** @defgroup STM3210E_EVAL_SRAM_Private_Variables STM3210E EVAL SRAM Private Variables
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* @{
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*/
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SRAM_HandleTypeDef sramHandle;
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static FSMC_NORSRAM_TimingTypeDef Timing;
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/**
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* @}
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*/
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/* Private function prototypes -----------------------------------------------*/
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/** @defgroup STM3210E_EVAL_SRAM_Private_Function_Prototypes STM3210E EVAL SRAM Private Function Prototypes
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* @{
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*/
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/**
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* @}
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*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup STM3210E_EVAL_SRAM_Exported_Functions STM3210E EVAL SRAM Exported Functions
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* @{
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*/
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/**
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* @brief Initializes the SRAM device.
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* @retval SRAM status
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*/
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uint8_t BSP_SRAM_Init(void)
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{
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sramHandle.Instance = FSMC_NORSRAM_DEVICE;
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sramHandle.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
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/* SRAM device configuration */
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Timing.AddressSetupTime = 2;
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Timing.AddressHoldTime = 1;
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Timing.DataSetupTime = 2;
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Timing.BusTurnAroundDuration = 1;
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Timing.CLKDivision = 2;
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Timing.DataLatency = 2;
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Timing.AccessMode = FSMC_ACCESS_MODE_A;
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sramHandle.Init.NSBank = FSMC_NORSRAM_BANK3;
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sramHandle.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
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sramHandle.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
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sramHandle.Init.MemoryDataWidth = SRAM_MEMORY_WIDTH;
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sramHandle.Init.BurstAccessMode = SRAM_BURSTACCESS;
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sramHandle.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
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sramHandle.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
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sramHandle.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
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sramHandle.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
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sramHandle.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
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sramHandle.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
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sramHandle.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
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sramHandle.Init.WriteBurst = SRAM_WRITEBURST;
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/* SRAM controller initialization */
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BSP_SRAM_MspInit();
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if(HAL_SRAM_Init(&sramHandle, &Timing, &Timing) != HAL_OK)
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{
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return SRAM_ERROR;
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}
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else
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{
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return SRAM_OK;
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}
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}
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/**
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* @brief Reads an amount of data from the SRAM device in polling mode.
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* @param uwStartAddress: Read start address
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* @param pData: Pointer to data to be read
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* @param uwDataSize: Size of read data from the memory
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* @retval SRAM status
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*/
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uint8_t BSP_SRAM_ReadData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
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{
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if(HAL_SRAM_Read_16b(&sramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
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{
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return SRAM_ERROR;
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}
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else
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{
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return SRAM_OK;
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}
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}
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/**
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* @brief Reads an amount of data from the SRAM device in DMA mode.
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* @param uwStartAddress: Read start address
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* @param pData: Pointer to data to be read
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* @param uwDataSize: Size of read data from the memory
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* @retval SRAM status
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*/
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uint8_t BSP_SRAM_ReadData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
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{
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if(HAL_SRAM_Read_DMA(&sramHandle, (uint32_t *)uwStartAddress, (uint32_t *)pData, uwDataSize) != HAL_OK)
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{
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return SRAM_ERROR;
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}
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else
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{
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return SRAM_OK;
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}
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}
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/**
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* @brief Writes an amount of data from the SRAM device in polling mode.
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* @param uwStartAddress: Write start address
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* @param pData: Pointer to data to be written
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* @param uwDataSize: Size of written data from the memory
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* @retval SRAM status
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*/
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uint8_t BSP_SRAM_WriteData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
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{
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if(HAL_SRAM_Write_16b(&sramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
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{
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return SRAM_ERROR;
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}
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else
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{
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return SRAM_OK;
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}
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}
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/**
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* @brief Writes an amount of data from the SRAM device in DMA mode.
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* @param uwStartAddress: Write start address
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* @param pData: Pointer to data to be written
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* @param uwDataSize: Size of written data from the memory
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* @retval SRAM status
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*/
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uint8_t BSP_SRAM_WriteData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
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{
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if(HAL_SRAM_Write_DMA(&sramHandle, (uint32_t *)uwStartAddress, (uint32_t *)pData, uwDataSize) != HAL_OK)
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{
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return SRAM_ERROR;
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}
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else
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{
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return SRAM_OK;
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}
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}
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/**
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* @brief Handles SRAM DMA transfer interrupt request.
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* @retval None
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*/
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void BSP_SRAM_DMA_IRQHandler(void)
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{
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HAL_DMA_IRQHandler(sramHandle.hdma);
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}
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/**
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* @brief Initializes SRAM MSP.
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* @retval None
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*/
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__weak void BSP_SRAM_MspInit(void)
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{
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static DMA_HandleTypeDef hdma1;
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GPIO_InitTypeDef gpioinitstruct = {0};
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/* Enable FSMC clock */
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__HAL_RCC_FSMC_CLK_ENABLE();
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/* Enable DMA1 and DMA2 clocks */
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__HAL_RCC_DMA1_CLK_ENABLE();
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/* Enable GPIOs clock */
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_GPIOE_CLK_ENABLE();
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__HAL_RCC_GPIOF_CLK_ENABLE();
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__HAL_RCC_GPIOG_CLK_ENABLE();
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/* Common GPIO configuration */
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gpioinitstruct.Mode = GPIO_MODE_AF_PP;
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gpioinitstruct.Pull = GPIO_NOPULL;
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gpioinitstruct.Speed = GPIO_SPEED_FREQ_HIGH;
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/*-- GPIO Configuration ------------------------------------------------------*/
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/*!< SRAM Data lines configuration */
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gpioinitstruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8 | GPIO_PIN_9 |
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GPIO_PIN_10 | GPIO_PIN_14 | GPIO_PIN_15;
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HAL_GPIO_Init(GPIOD, &gpioinitstruct);
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gpioinitstruct.Pin = GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 |
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GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |
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GPIO_PIN_15;
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HAL_GPIO_Init(GPIOE, &gpioinitstruct);
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/*!< SRAM Address lines configuration */
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gpioinitstruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 |
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GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_12 | GPIO_PIN_13 |
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GPIO_PIN_14 | GPIO_PIN_15;
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HAL_GPIO_Init(GPIOF, &gpioinitstruct);
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gpioinitstruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 |
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GPIO_PIN_4 | GPIO_PIN_5;
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HAL_GPIO_Init(GPIOG, &gpioinitstruct);
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gpioinitstruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
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HAL_GPIO_Init(GPIOD, &gpioinitstruct);
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/*!< NOE and NWE configuration */
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gpioinitstruct.Pin = GPIO_PIN_4 |GPIO_PIN_5;
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HAL_GPIO_Init(GPIOD, &gpioinitstruct);
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/*!< NE3 configuration */
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gpioinitstruct.Pin = GPIO_PIN_10 |GPIO_PIN_12;
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HAL_GPIO_Init(GPIOG, &gpioinitstruct);
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/*!< NBL0, NBL1 configuration */
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gpioinitstruct.Pin = GPIO_PIN_0 | GPIO_PIN_1;
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HAL_GPIO_Init(GPIOE, &gpioinitstruct);
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/* Configure common DMA parameters */
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hdma1.Init.Direction = DMA_MEMORY_TO_MEMORY;
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hdma1.Init.PeriphInc = DMA_PINC_ENABLE;
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hdma1.Init.MemInc = DMA_MINC_ENABLE;
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hdma1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
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hdma1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
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hdma1.Init.Mode = DMA_NORMAL;
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hdma1.Init.Priority = DMA_PRIORITY_HIGH;
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hdma1.Instance = DMA1_Channel1;
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/* Deinitialize the Stream for new transfer */
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HAL_DMA_DeInit(&hdma1);
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/* Configure the DMA Stream */
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HAL_DMA_Init(&hdma1);
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/* Associate the DMA handle to the FSMC SRAM one */
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sramHandle.hdma = &hdma1;
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/* NVIC configuration for DMA transfer complete interrupt */
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HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0xC, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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