427 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			427 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
/* ----------------------------------------------------------------------
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 * Project:      CMSIS DSP Library
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 * Title:        arm_rfft_q15.c
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 * Description:  RFFT & RIFFT Q15 process function
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 *
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 * $Date:        27. January 2017
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 * $Revision:    V.1.5.1
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 *
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 * Target Processor: Cortex-M cores
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 * -------------------------------------------------------------------- */
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/*
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 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
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 *
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 * SPDX-License-Identifier: Apache-2.0
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 *
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 * Licensed under the Apache License, Version 2.0 (the License); you may
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 * not use this file except in compliance with the License.
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 * You may obtain a copy of the License at
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 *
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 * www.apache.org/licenses/LICENSE-2.0
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 *
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 * Unless required by applicable law or agreed to in writing, software
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 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
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 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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 * See the License for the specific language governing permissions and
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 * limitations under the License.
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 */
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#include "arm_math.h"
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/* ----------------------------------------------------------------------
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 * Internal functions prototypes
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 * -------------------------------------------------------------------- */
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void arm_split_rfft_q15(
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    q15_t * pSrc,
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    uint32_t fftLen,
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    q15_t * pATable,
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    q15_t * pBTable,
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    q15_t * pDst,
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    uint32_t modifier);
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void arm_split_rifft_q15(
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    q15_t * pSrc,
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    uint32_t fftLen,
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    q15_t * pATable,
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    q15_t * pBTable,
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    q15_t * pDst,
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    uint32_t modifier);
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/**
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* @addtogroup RealFFT
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* @{
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*/
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/**
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* @brief Processing function for the Q15 RFFT/RIFFT.
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* @param[in]  *S    points to an instance of the Q15 RFFT/RIFFT structure.
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* @param[in]  *pSrc points to the input buffer.
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* @param[out] *pDst points to the output buffer.
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* @return none.
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*
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* \par Input an output formats:
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* \par
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* Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
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* Hence the output format is different for different RFFT sizes.
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* The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
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* \par
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* \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT"
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* \par
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* \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT"
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*/
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void arm_rfft_q15(
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    const arm_rfft_instance_q15 * S,
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    q15_t * pSrc,
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    q15_t * pDst)
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{
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    const arm_cfft_instance_q15 *S_CFFT = S->pCfft;
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    uint32_t i;
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    uint32_t L2 = S->fftLenReal >> 1;
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    /* Calculation of RIFFT of input */
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    if (S->ifftFlagR == 1U)
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    {
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        /*  Real IFFT core process */
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        arm_split_rifft_q15(pSrc, L2, S->pTwiddleAReal,
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                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
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        /* Complex IFFT process */
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        arm_cfft_q15(S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
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        for(i=0;i<S->fftLenReal;i++)
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        {
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            pDst[i] = pDst[i] << 1;
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        }
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    }
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    else
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    {
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        /* Calculation of RFFT of input */
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        /* Complex FFT process */
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        arm_cfft_q15(S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
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        /*  Real FFT core process */
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        arm_split_rfft_q15(pSrc, L2, S->pTwiddleAReal,
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                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
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    }
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}
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/**
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* @} end of RealFFT group
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*/
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/**
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* @brief  Core Real FFT process
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* @param  *pSrc 				points to the input buffer.
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* @param  fftLen  				length of FFT.
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* @param  *pATable 			points to the A twiddle Coef buffer.
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* @param  *pBTable 			points to the B twiddle Coef buffer.
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* @param  *pDst 				points to the output buffer.
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* @param  modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
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* @return none.
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* The function implements a Real FFT
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*/
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void arm_split_rfft_q15(
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    q15_t * pSrc,
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    uint32_t fftLen,
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    q15_t * pATable,
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    q15_t * pBTable,
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    q15_t * pDst,
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    uint32_t modifier)
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{
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    uint32_t i;                                    /* Loop Counter */
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    q31_t outR, outI;                              /* Temporary variables for output */
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    q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
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    q15_t *pSrc1, *pSrc2;
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#if defined (ARM_MATH_DSP)
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    q15_t *pD1, *pD2;
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#endif
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    //  pSrc[2U * fftLen] = pSrc[0];
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    //  pSrc[(2U * fftLen) + 1U] = pSrc[1];
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    pCoefA = &pATable[modifier * 2U];
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    pCoefB = &pBTable[modifier * 2U];
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    pSrc1 = &pSrc[2];
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    pSrc2 = &pSrc[(2U * fftLen) - 2U];
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#if defined (ARM_MATH_DSP)
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    /* Run the below code for Cortex-M4 and Cortex-M3 */
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    i = 1U;
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    pD1 = pDst + 2;
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    pD2 = pDst + (4U * fftLen) - 2;
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    for(i = fftLen - 1; i > 0; i--)
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    {
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        /*
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        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
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        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
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        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
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        */
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        /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
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        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
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        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
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#ifndef ARM_MATH_BIG_ENDIAN
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        /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */
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        outR = __SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA));
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#else
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        /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */
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        outR = -(__SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA)));
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#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
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        /* pSrc[2 * n - 2 * i] * pBTable[2 * i] +
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        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
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        outR = __SMLAD(*__SIMD32(pSrc2), *__SIMD32(pCoefB), outR) >> 16U;
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        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
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        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
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#ifndef ARM_MATH_BIG_ENDIAN
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        outI = __SMUSDX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
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#else
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        outI = __SMUSDX(*__SIMD32(pCoefB), *__SIMD32(pSrc2)--);
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#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
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        /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */
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        outI = __SMLADX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), outI);
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        /* write output */
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        *pD1++ = (q15_t) outR;
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        *pD1++ = outI >> 16U;
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        /* write complex conjugate output */
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        pD2[0] = (q15_t) outR;
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        pD2[1] = -(outI >> 16U);
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        pD2 -= 2;
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        /* update coefficient pointer */
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        pCoefB = pCoefB + (2U * modifier);
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        pCoefA = pCoefA + (2U * modifier);
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    }
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    pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
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    pDst[(2U * fftLen) + 1U] = 0;
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    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
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    pDst[1] = 0;
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#else
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    /* Run the below code for Cortex-M0 */
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    i = 1U;
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    while (i < fftLen)
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    {
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        /*
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        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
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        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
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        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
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        */
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        outR = *pSrc1 * *pCoefA;
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        outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1));
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        outR = outR + (*pSrc2 * *pCoefB);
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        outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 16;
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        /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
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        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
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        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
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        */
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        outI = *pSrc2 * *(pCoefB + 1);
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        outI = outI - (*(pSrc2 + 1) * *pCoefB);
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        outI = outI + (*(pSrc1 + 1) * *pCoefA);
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        outI = outI + (*pSrc1 * *(pCoefA + 1));
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        /* update input pointers */
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        pSrc1 += 2U;
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        pSrc2 -= 2U;
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        /* write output */
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        pDst[2U * i] = (q15_t) outR;
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        pDst[(2U * i) + 1U] = outI >> 16U;
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        /* write complex conjugate output */
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        pDst[(4U * fftLen) - (2U * i)] = (q15_t) outR;
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        pDst[((4U * fftLen) - (2U * i)) + 1U] = -(outI >> 16U);
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        /* update coefficient pointer */
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        pCoefB = pCoefB + (2U * modifier);
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        pCoefA = pCoefA + (2U * modifier);
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        i++;
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    }
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    pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
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    pDst[(2U * fftLen) + 1U] = 0;
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    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
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    pDst[1] = 0;
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#endif /* #if defined (ARM_MATH_DSP) */
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}
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/**
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* @brief  Core Real IFFT process
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* @param[in]   *pSrc 				points to the input buffer.
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* @param[in]   fftLen  		    length of FFT.
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* @param[in]   *pATable 			points to the twiddle Coef A buffer.
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* @param[in]   *pBTable 			points to the twiddle Coef B buffer.
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* @param[out]  *pDst 				points to the output buffer.
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* @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
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* @return none.
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* The function implements a Real IFFT
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*/
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void arm_split_rifft_q15(
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    q15_t * pSrc,
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    uint32_t fftLen,
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    q15_t * pATable,
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    q15_t * pBTable,
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    q15_t * pDst,
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    uint32_t modifier)
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{
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    uint32_t i;                                    /* Loop Counter */
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    q31_t outR, outI;                              /* Temporary variables for output */
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    q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
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    q15_t *pSrc1, *pSrc2;
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    q15_t *pDst1 = &pDst[0];
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    pCoefA = &pATable[0];
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    pCoefB = &pBTable[0];
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    pSrc1 = &pSrc[0];
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    pSrc2 = &pSrc[2U * fftLen];
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#if defined (ARM_MATH_DSP)
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    /* Run the below code for Cortex-M4 and Cortex-M3 */
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    i = fftLen;
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    while (i > 0U)
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    {
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        /*
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        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
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        pIn[2 * n - 2 * i] * pBTable[2 * i] -
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        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
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        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
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        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
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        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
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        */
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#ifndef ARM_MATH_BIG_ENDIAN
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        /* pIn[2 * n - 2 * i] * pBTable[2 * i] -
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        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
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        outR = __SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB));
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#else
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        /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] +
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        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
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        outR = -(__SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB)));
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#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
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        /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
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        pIn[2 * n - 2 * i] * pBTable[2 * i] */
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        outR = __SMLAD(*__SIMD32(pSrc1), *__SIMD32(pCoefA), outR) >> 16U;
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        /*
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        -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] +
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        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
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        outI = __SMUADX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
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        /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
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#ifndef ARM_MATH_BIG_ENDIAN
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        outI = __SMLSDX(*__SIMD32(pCoefA), *__SIMD32(pSrc1)++, -outI);
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#else
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        outI = __SMLSDX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), -outI);
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#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
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        /* write output */
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#ifndef ARM_MATH_BIG_ENDIAN
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        *__SIMD32(pDst1)++ = __PKHBT(outR, (outI >> 16U), 16);
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#else
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        *__SIMD32(pDst1)++ = __PKHBT((outI >> 16U), outR, 16);
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#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
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        /* update coefficient pointer */
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        pCoefB = pCoefB + (2U * modifier);
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        pCoefA = pCoefA + (2U * modifier);
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        i--;
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    }
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#else
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    /* Run the below code for Cortex-M0 */
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    i = fftLen;
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    while (i > 0U)
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    {
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        /*
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        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
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        pIn[2 * n - 2 * i] * pBTable[2 * i] -
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						|
        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
 | 
						|
        */
 | 
						|
 | 
						|
        outR = *pSrc2 * *pCoefB;
 | 
						|
        outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
 | 
						|
        outR = outR + (*pSrc1 * *pCoefA);
 | 
						|
        outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16;
 | 
						|
 | 
						|
        /*
 | 
						|
        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
 | 
						|
        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
 | 
						|
        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
 | 
						|
        */
 | 
						|
 | 
						|
        outI = *(pSrc1 + 1) * *pCoefA;
 | 
						|
        outI = outI - (*pSrc1 * *(pCoefA + 1));
 | 
						|
        outI = outI - (*pSrc2 * *(pCoefB + 1));
 | 
						|
        outI = outI - (*(pSrc2 + 1) * *(pCoefB));
 | 
						|
 | 
						|
        /* update input pointers */
 | 
						|
        pSrc1 += 2U;
 | 
						|
        pSrc2 -= 2U;
 | 
						|
 | 
						|
        /* write output */
 | 
						|
        *pDst1++ = (q15_t) outR;
 | 
						|
        *pDst1++ = (q15_t) (outI >> 16);
 | 
						|
 | 
						|
        /* update coefficient pointer */
 | 
						|
        pCoefB = pCoefB + (2U * modifier);
 | 
						|
        pCoefA = pCoefA + (2U * modifier);
 | 
						|
 | 
						|
        i--;
 | 
						|
    }
 | 
						|
#endif /* #if defined (ARM_MATH_DSP) */
 | 
						|
}
 |