91 lines
3.4 KiB
Plaintext
91 lines
3.4 KiB
Plaintext
/**
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@page TIM_PWMOutput TIM example
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@verbatim
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******************** (C) COPYRIGHT 2016 STMicroelectronics *******************
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* @file Examples_LL/TIM/TIM_PWMOutput/readme.txt
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* @author MCD Application Team
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* @brief Description of the TIM_PWMOutput example.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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Use of a timer peripheral to generate a
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PWM output signal and update the PWM duty cycle. This example is based on the
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STM32F1xx TIM LL API. The peripheral initialization uses
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LL unitary service functions for optimization purposes (performance and size).
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In this example TIM2 input clock TIM2CLK is set to APB1 clock (PCLK1),
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since APB1 pre-scaler is equal to 1.
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TIM2CLK = PCLK1
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PCLK1 = HCLK
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=> TIM2CLK = SystemCoreClock (72 MHz)
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To set the TIM2 counter clock frequency to 10 KHz, the pre-scaler (PSC) is
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calculated as follows:
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PSC = (TIM2CLK / TIM2 counter clock) - 1
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PSC = (SystemCoreClock /10 KHz) - 1
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SystemCoreClock is set to 72 MHz for STM32F1xx Devices.
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Auto-reload (ARR) is calculated to get a time base period of 10 ms,
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meaning a time base frequency of 100 Hz.
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ARR = (TIM2 counter clock / time base frequency) - 1
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ARR = (TIM2 counter clock / 100) - 1
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Initially, the capture/compare register (CCR1) of the output channel is set to
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half the auto-reload value meaning a initial duty cycle of 50%.
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Generally speaking this duty cycle is calculated as follows:
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Duty cycle = (CCR1 / ARR) * 100
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The timer output channel is mapped on the pin PA.00. You can connect it to
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an oscilloscope to monitor the waveform.
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User push-button can be used to change the duty cycle from 0% up to 100% by
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steps of 10%. Duty cycle is periodically measured. It can be observed through
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the debugger by watching the variable uwMeasuredDutyCycle.
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Initially the output channel is configured in output compare toggle mode.
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@note If the dutycycle is 0% so there is no PWM signal. When pushing
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successively the user button, the dutycycle value keep increasing.
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@par Directory contents
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- TIM/TIM_PWMOutput/Inc/stm32f1xx_it.h Interrupt handlers header file
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- TIM/TIM_PWMOutput/Inc/main.h Header for main.c module
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- TIM/TIM_PWMOutput/Inc/stm32_assert.h Template file to include assert_failed function
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- TIM/TIM_PWMOutput/Src/stm32f1xx_it.c Interrupt handlers
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- TIM/TIM_PWMOutput/Src/main.c Main program
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- TIM/TIM_PWMOutput/Src/system_stm32f1xx.c STM32F1xx system source file
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@par Hardware and Software environment
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- This example runs on STM32F103xB devices.
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- This example has been tested with STM32F103RB-Nucleo board and can be
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easily tailored to any other supported device and development board.
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- Connect PA.00 (TIM2 Channel1) to an oscilloscope.
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@par How to use it ?
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In order to make the program work, you must do the following :
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the example
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*/
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