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			3.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
			
		
		
	
	
			95 lines
		
	
	
		
			3.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
| /**
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|   @page TIM_OutputCompare TIM example
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|   
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|   @verbatim
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|   ******************** (C) COPYRIGHT 2016 STMicroelectronics *******************
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|   * @file    Examples_LL/TIM/TIM_OutputCompare/readme.txt 
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|   * @author  MCD Application Team
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|   * @brief   Description of the TIM_OutputCompare example.
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|   ******************************************************************************
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|   * @attention
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|   *
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|   * Copyright (c) 2016 STMicroelectronics.
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|   * All rights reserved.
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|   *
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|   * This software is licensed under terms that can be found in the LICENSE file
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|   * in the root directory of this software component.
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|   * If no LICENSE file comes with this software, it is provided AS-IS.
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|   *
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|   ******************************************************************************
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|   @endverbatim
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| 
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| @par Example Description
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| 
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| Configuration of the TIM peripheral to generate an output 
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| waveform in different output compare modes. This example is based on the 
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| STM32F1xx TIM LL API. The peripheral initialization uses 
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| LL unitary service functions for optimization purposes (performance and size).
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| 
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| In this example TIM2 input clock (TIM2CLK) frequency is set to APB1 clock (PCLK1),
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| since APB1 pre-scaler is equal to 1.
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|     TIM2CLK = PCLK1
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|     PCLK1 = HCLK
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|     => TIM2CLK = HCLK = SystemCoreClock (72 Mhz)
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| 
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| To set the TIM2 counter clock frequency to 10 KHz, the pre-scaler (PSC) is
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| calculated as follows:
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| PSC = (TIM2CLK / TIM2 counter clock) - 1
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| PSC = (SystemCoreClock /10 KHz) - 1
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| 
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| SystemCoreClock is set to 72 MHz for STM32F1xx Devices.
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| 
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| Auto-reload (ARR) is calculated to get a time base period of 100 ms,
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| meaning a time base frequency of 10 Hz.
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| ARR = (TIM2 counter clock / time base frequency) - 1
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| ARR = (TIM2 counter clock / 10) - 1
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| 
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| The capture/compare register (CCR1) of the output channel is set to half the
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| auto-reload value. Therefore the timer output compare delay is 50 ms.
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| Generally speaking this delay is calculated as follows:
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| CC1_delay = TIM2 counter clock / CCR1
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| 
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| The timer output channel is mapped on the pin PA.00. You can connect it to
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| an oscilloscope to monitor the waveform.
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| 
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| User push-button can be used to change the output compare mode:
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|   - When the output channel is configured in output compare toggle: The output
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|     TOGGLES when the counter (CNT) matches the capture/compare register (CCR1).
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|   - When the output channel is configured in output compare active: The output is
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|     switched ON when the counter (CNT) matches the capture/compare register
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|     (CCR1).
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|   - When the output channel is configured in output compare inactive: The output is
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|     switched OFF when the counter (CNT) matches the capture/compare register
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|     (CCR1).
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|     
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| Initially the output channel is configured in output compare toggle mode.
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| 
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| @par Directory contents 
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| 
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|   - TIM/TIM_OutputCompare/Inc/stm32f1xx_it.h          Interrupt handlers header file
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|   - TIM/TIM_OutputCompare/Inc/main.h                  Header for main.c module
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|   - TIM/TIM_OutputCompare/Inc/stm32_assert.h          Template file to include assert_failed function
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|   - TIM/TIM_OutputCompare/Src/stm32f1xx_it.c          Interrupt handlers
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|   - TIM/TIM_OutputCompare/Src/main.c                  Main program
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|   - TIM/TIM_OutputCompare/Src/system_stm32f1xx.c      STM32F1xx system source file
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| 
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| 
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| @par Hardware and Software environment
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| 
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|   - This example runs on STM32F103xB devices.
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|     
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|   - This example has been tested with STM32F103RB-Nucleo board and can be
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|     easily tailored to any other supported device and development board.
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| 
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|   - Connect PA.00 (TIM2 Channel1) to an oscilloscope.
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| 
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| @par How to use it ? 
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| 
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| In order to make the program work, you must do the following :
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|  - Open your preferred toolchain
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|  - Rebuild all files and load your image into target memory
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|  - Run the example
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| 
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| 
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|  */
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