diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h index e98e4c4..3275b8a 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -5147,12 +5147,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h index abe71ee..33299f7 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -5661,12 +5661,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h index dd80728..f4b5fc8 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -4683,12 +4683,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h index c9128f0..d896f33 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -4745,12 +4745,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h index 3e9c2f6..138bc9d 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -5720,12 +5720,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h index a0bfda1..5533143 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -5794,12 +5794,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h index bd5aceb..8ae48f4 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -5802,12 +5802,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h index d43ebe7..d55c385 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -5856,12 +5856,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h index d88068a..d7a5d0d 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -9399,12 +9399,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h index 8171849..6892d96 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -9461,12 +9461,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h index 9725d78..3aa717a 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -10861,12 +10861,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h index 6e6c7f0..3d72d36 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -10930,12 +10930,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h index ffe062d..bf5a932 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -12187,12 +12187,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U) diff --git a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h index c80d6a1..95c9f28 100644 --- a/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h +++ b/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h @@ -9,7 +9,7 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -12279,12 +12279,12 @@ typedef struct #define USART_DR_DR USART_DR_DR_Msk /*!< Data value */ /****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction_Pos (0U) -#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */ -#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa_Pos (4U) -#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */ -#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!< Mantissa of USARTDIV */ +#define USART_BRR_DIV_FRACTION_Pos (0U) +#define USART_BRR_DIV_FRACTION_Msk (0xFUL << USART_BRR_DIV_FRACTION_Pos) /*!< 0x0000000F */ +#define USART_BRR_DIV_FRACTION USART_BRR_DIV_FRACTION_Msk /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_MANTISSA_Pos (4U) +#define USART_BRR_DIV_MANTISSA_Msk (0xFFFUL << USART_BRR_DIV_MANTISSA_Pos) /*!< 0x0000FFF0 */ +#define USART_BRR_DIV_MANTISSA USART_BRR_DIV_MANTISSA_Msk /*!< Mantissa of USARTDIV */ /****************** Bit definition for USART_CR1 register *******************/ #define USART_CR1_SBK_Pos (0U)